Technological stages of microprocessor production. Modern microprocessors What material is the basis for the manufacture of microprocessors

Introduction. 2

1. Technologies for the production of microprocessors. 4

1.2 The main stages of production. 8

1.3 Growing silicon dioxide and creating conductive regions. nine

1.4 Testing. eleven

1.5 Manufacturing of the case. eleven

1.6 Production prospects. 12

2. Features of the production of microprocessors. eighteen

3. Technological stages of microprocessor production. 26

3.1 How chips are made .. 26

1.2 It all starts with substrates. 27

1.3 Manufacture of substrates. 27

1.4 Alloying, diffusion. 29

1.5 Creating a mask. thirty

1.6 Photolithography. 31

Conclusion. 37

References .. 38

Introduction

Modern microprocessors are the fastest and smartest microcircuits in the world. They can perform up to 4 billion operations per second and are produced using many different technologies. Since the early 90s of the 20th century, when processors went into mass use, they have gone through several stages of development. The apogee of the development of microprocessor structures using the existing technologies of 6th generation microprocessors was 2002, when it became available to use all the basic properties of silicon to obtain high frequencies with the least losses in production and creation of logic circuits. Now, the efficiency of new processors is decreasing somewhat, despite the constant increase in the frequency of the crystals.

A microprocessor is an integrated circuit formed on a small silicon chip. Silicon is used in microcircuits due to the fact that it has semiconducting properties: its electrical conductivity is higher than that of dielectrics, but less than that of metals. Silicon can be made both as an insulator that prevents the movement of electric charges, and as a conductor - then electric charges will freely pass through it. The conductivity of a semiconductor can be controlled by introducing impurities.

The microprocessor contains millions of transistors, interconnected by thinnest conductors of aluminum or copper, and used for data processing. This is how the internal tires are formed. As a result, the microprocessor performs many functions - from mathematical and logical operations to controlling the operation of other microcircuits and the entire computer.

One of the main parameters of the microprocessor is the crystal frequency, which determines the number of operations per unit of time, the frequency of the system bus, and the amount of internal SRAM cache. The processor is marked by the frequency of the crystal. The frequency of the crystal is determined by the switching frequency of the transistors from the closed state to the open state. The ability of a transistor to switch faster is determined by the technology used to manufacture the silicon wafers from which the chips are made. The dimension of the technological process determines the size of the transistor (its thickness and gate length). For example, using the 90nm process technology that was introduced in early 2004, the transistor size is 90nm and the gate length is 50nm.

All modern processors use field effect transistors. The transition to a new technical process allows you to create transistors with a higher switching frequency, lower leakage currents, and smaller sizes. Downsizing allows you to simultaneously reduce die area, and hence heat dissipation, and a thinner gate allows you to apply less voltage for switching, which also reduces power consumption and heat dissipation.

1. Microprocessor manufacturing technologies

Now an interesting trend is observed on the market: on the one hand, manufacturing companies are trying to introduce new technical processes and technologies into their new products as quickly as possible, on the other hand, there is an artificial restraint in the growth of processor frequencies. Firstly, marketers feel that the market is not fully prepared for the next change of processor families, and firms have not yet received enough profit from the sales of CPUs that are currently being produced - the stock has not dried up yet. The prevalence of the importance of the price of the finished product over all other interests of the companies is quite noticeable. Secondly, a significant decrease in the rate of the "frequency race" is associated with the understanding of the need to introduce new technologies that actually increase productivity with a minimum amount of technological costs. As already noted, manufacturers have encountered problems when switching to new technical processes.

The technological norm of 90 nm turned out to be a rather serious technological barrier for many chip manufacturers. This is confirmed by TSMC, which manufactures chips for many market giants such as AMD, nVidia, ATI, VIA. For a long time, she was unable to establish the production of chips using 0.09 micron technology, which led to a low yield of suitable crystals. This is one of the reasons why AMD has been postponing the release of its SOI (Silicon-on-Insulator) processors for a long time. This is due to the fact that it is on this dimension of the elements that all kinds of previously not so strongly perceptible negative factors such as leakage currents, a large scatter of parameters and an exponential increase in heat release began to manifest themselves strongly. Let's figure it out in order.

As you know, there are two leakage currents: gate leakage current and subthreshold leakage. The first is caused by the spontaneous movement of electrons between the silicon substrate of the channel and the polysilicon gate. The second is the spontaneous movement of electrons from the source of the transistor to the drain. Both of these effects lead to the fact that you have to raise the supply voltage to control the currents in the transistor, which negatively affects the heat generation. So, by reducing the size of the transistor, we, first of all, reduce its gate and the silicon dioxide (SiO2) layer, which is a natural barrier between the gate and the channel. On the one hand, this improves the speed characteristics of the transistor (switching time), but on the other hand, it increases the leakage. That is, a kind of closed cycle turns out. So the transition to 90 nm is another decrease in the thickness of the dioxide layer, and at the same time an increase in leaks. The fight against leaks is, again, an increase in control voltages, and, accordingly, a significant increase in heat generation. All this led to a delay in the introduction of a new technical process on the part of competitors in the microprocessor market - Intel and AMD.

One alternative solution is the use of SOI (silicon on insulator) technology, which AMD recently introduced in its

64-bit processors. However, it cost her a lot of effort and overcoming a large number of associated difficulties. But the technology itself provides a huge number of advantages with a relatively small number of disadvantages. The essence of the technology, in general, is quite logical - the transistor is separated from the silicon substrate by another thin layer of insulator. There are lots of pluses. No uncontrolled movement of electrons under the channel of the transistor, which affects its electrical characteristics - once. After supplying the unlocking current to the gate, the time of channel ionization to the operating state, until the moment when the operating current flows through it, is reduced, that is, the second key parameter of the transistor performance improves, the time of its on / off is two. Or, at the same speed, you can simply lower the unlocking current - three. Or find some kind of compromise between increasing the speed of work and decreasing the voltage. While maintaining the same unlocking current, the increase in transistor performance can be up to 30%, if you leave the frequency the same, focusing on energy saving, then there can be a plus - up to 50%. Finally, the characteristics of the channel become more predictable, and the transistor itself becomes more resistant to sporadic errors, such as those caused by cosmic particles, falling into the channel substrate and unexpectedly ionizing it. Now, getting into the substrate located under the insulator layer, they have no effect on the operation of the transistor. The only drawback of SOI is that it is necessary to reduce the depth of the emitter / collector region, which directly and directly affects the increase in its resistance as the thickness decreases.

And finally, the third reason that contributed to the slowdown in frequency growth is the low activity of competitors in the market. We can say that everyone was busy with their own affairs. AMD was engaged in the widespread introduction of 64-bit processors, for Intel it was a period of improving a new technical process, debugging for an increased yield of suitable crystals.

The beginning of the year should bring us a lot of news from the field of technology, because it is this year that both companies should switch to 90 nm technology standards. But this does not mean a new rapid growth in processor frequencies, rather the opposite. At first, there will be a lull in the market: competitors will start releasing CPUs using new technical processes, but with old frequencies. As the production process is mastered, some increase in the frequency of chips will begin. Most likely, it will not be as noticeable as before. By the end of 2004, when the yield of suitable crystals on the 90nm process technology will increase significantly, Intel expects to conquer the top at 4 GHz, or even more. AMD processors will come with some traditional frequency lag, which, in general, does not affect the performance as much as the microarchitecture features.

So, the need to switch to new technical processes is obvious, but technologists are given this every time more and more with great difficulty. First processors

Pentium (1993) were produced according to the 0.8 micron process technology, then 0.6 microns each. In 1995, for the first time for 6th generation processors, the 0.35 micron process technology was applied. In 1997, it changed to 0.25 microns, and in 1999 - to 0.18 microns. Modern processors are made using 0.13 and 0.09 micron technologies, the latter being introduced in 2004. As you can see, for these technical processes, Moore's law is observed, which states that every two years the frequency of crystals doubles with an increase in the number of transistors from them. The technical process is changing at the same pace. True, in the future the "frequency race" will outpace this law. By 2006, Intel plans to master the 65nm process technology, and in 2009 - 32nm. The principle of Moore's Law is shown in Figure 1.

Figure 1 - Principle of Moore's Law.

Here it is time to recall the structure of the transistor, namely, a thin layer of silicon dioxide, an insulator located between the gate and the channel, and performing an understandable function - a barrier for electrons, preventing leakage of the gate current. Obviously, the thicker this layer, the better it performs its insulating functions, but it is an integral part of the channel, and it is no less obvious that if we are going to reduce the length of the channel (the size of the transistor), then we need to reduce its thickness. at a fast pace. By the way, over the past several decades, the thickness of this layer is on average about 1/45 of the entire length of the channel. But this process has its end - as the same Intel claimed five years ago, if you continue to use SiO2, as it has been over the past 30 years, the minimum layer thickness will be 2.3. nm, otherwise the leakage current of the gate current will acquire simply unrealistic values.

Until recently, nothing was done to reduce the subchannel leakage, now the situation is starting to change, since the operating current,

along with shutter time, is one of two main

parameters characterizing the speed of the transistor, and the leakage in the off state directly affects it - to maintain the required efficiency of the transistor, it is necessary, accordingly, to raise the operating current, with all the ensuing conditions.

1.2 The main stages of production

Manufacturing of a microprocessor is a complex process that includes more than 300 stages. Microprocessors are formed on the surface of thin circular silicon wafers - substrates, as a result of a certain sequence of different processing processes using chemicals, gases and ultraviolet radiation.

Substrates are usually 200 millimeters, or 8 inches in diameter. However, Intel has already switched to 300 mm or 12-inch wafers. New plates allow to obtain almost 4 times more crystals, and the yield is much higher. The wafers are made from silicon, which is refined, melted and grown into long cylindrical crystals. The crystals are then cut into thin wafers and polished until their surfaces are mirror-smooth and free from defects. Then, sequentially, cyclically repeating thermal oxidation (formation of an SiO2 film), photolithography, diffusion of impurities (phosphorus), epitaxy (layer growth) are performed.

In the process of manufacturing microcircuits, the thinnest layers of materials are applied to the blank plates in the form of carefully calculated patterns. One plate can accommodate up to several hundred microprocessors, the manufacture of which requires more than 300 operations. The entire process of manufacturing processors can be divided into several stages: growing silicon dioxide and creating conductive regions, testing, making a case, and shipping.

1.3 Growing silicon dioxide and creating conductive regions

The microprocessor manufacturing process begins by "growing" an insulating layer of silicon dioxide on the surface of a polished plate. This stage is carried out in an electric oven at a very high temperature. The thickness of the oxide layer depends on the temperature and time that the plate spends in the oven.

This is followed by photolithography, a process during which a schematic drawing is formed on the surface of the plate. First, a temporary layer of a photosensitive material is applied to the plate - a photoresist, onto which an image of transparent areas of the template, or photomask is projected using ultraviolet radiation. Masks are made during processor design and are used to generate circuit patterns in each layer of the processor. Under the influence of radiation, the illuminated areas of the photolayer become soluble, and they are removed with a solvent (hydrofluoric acid), revealing the silicon dioxide underneath.

The exposed silica is removed by a process called etching. Then the remaining photolayer is removed, as a result of which a pattern of silicon dioxide remains on the semiconductor wafer. As a result of a number of additional operations of photolithography and etching, polycrystalline silicon with the properties of a conductor is also applied to the wafer. During the next operation, called "doping", the exposed areas of the silicon wafer are bombarded with ions of various chemical elements, which form negative and positive charges in silicon, which change the electrical conductivity of these areas.

The imposition of new layers with subsequent etching of the circuit is carried out several times, while for the interlayer connections in the layers "windows" are left, which are filled with metal, forming electrical connections between the layers. Intel used copper conductors in its 0.13 micron manufacturing process. Intel used aluminum in its 0.18 micron manufacturing process and previous generation processes. Both copper and aluminum are excellent conductors of electricity. When using the 0.18-micron technical process, 6 layers were used, while introducing the 90 nm technical process in 2004, 7 layers of silicon were used.

Each layer of the processor has its own pattern, together all these layers form a three-dimensional electronic circuit. The application of layers is repeated 20 - 25 times over several weeks.

1.4 Testing

In order to withstand the stresses that the substrates are subjected to during the deposition process, the silicon wafers must be initially thick enough. Therefore, before cutting the plate into separate microprocessors, its thickness is reduced by 33% using special processes and contaminants are removed from the back side. Then a layer of a special material is applied to the reverse side of the "thinned" plate, which improves the subsequent fastening of the crystal to the case. In addition, this layer provides electrical contact between the back surface of the integrated circuit and the package after assembly.

After that, the plates are tested to check the quality of all machining operations. Individual components are tested to determine if processors are working properly. If faults are detected, the data about them is analyzed to understand at what stage of processing the failure occurred.

Electrical probes are then connected to each processor and supplied with power. Processors are tested by a computer, which determines whether the manufactured processors meet specified specifications.

1.5 Manufacturing the case

After testing, the wafers are sent to an assembly shop where they are cut into small rectangles, each containing an integrated circuit. A special precision saw is used to separate the plate. Non-working crystals are discarded.

Then each crystal is placed in an individual case. The case protects the crystal from external influences and provides its electrical connection to the board on which it will be subsequently installed. Tiny balls of solder, located at specific points on the crystal, are soldered to the electrical leads of the package. Now electrical signals can go from board to chip and vice versa.

In future processors, Intel will use BBUL technology, which will allow to create fundamentally new cases with less heat dissipation and capacity between the CPU legs.

After installing the die in the package, the processor is tested again to determine if it is operational. Defective processors are discarded, and serviceable processors are subjected to stress tests: exposure to various temperature and humidity conditions, as well as electrostatic discharges. After each stress test, the processor is tested to determine its functional state. The processors are then sorted according to their behavior at different clock speeds and supply voltages.

Delivery. The processors that have passed the tests go to the final inspection, the task of which is to confirm that the results of all previous tests were correct, and the parameters of the integrated circuit meet the established standards or even exceed them. All processors that pass final inspection are marked and packaged for delivery to customers

1.6 Production prospects

Founded by Robert Noyce and Gordon Moore in 1968, Intel (Integrated Electronics) set itself the goal of using the achievements of semiconductor technology to create highly efficient and complex electronic devices on a silicon chip: large memory, processors, interface units. The company's first product was a Schottky bipolar transistor memory chip, released in 1969. Intel announced the world's first i4004 microprocessor designed for use in microcalculators in November 1971. This 4-bit processor contained 2300 p-channel MOS transistors located on a chip with an area of \u200b\u200b3.8x2.8 mm, and worked at a clock frequency of 108 KHz, providing addressing of 4 KB of ROM and 512 bytes of RAM. This was the first development of Intel.

The Intel Pentium 4 processor is the most advanced processor available today. The first Pentium 4 (codenamed Willamette) appeared in 2000. It was a fundamentally new processor with Hyper pipelining - with a pipeline consisting of 20 stages, each of which is shortened. Binary compatible with previous generations of Intel architecture processors. According to Intel, processors based on this technology can achieve a frequency increase of about 40 percent relative to the P6 family with the same technological process. This CPU is based on Intel NetBurst technology:

Hyperpipeline Technology: Extended pipeline length increases processor throughput.

SSE2 Streaming SIMD Extensions Set: 144 new instructions to accelerate a wide range of resource-intensive applications

The mechanism of accelerated execution of commands: The arithmetic logic block operates at a clock frequency of twice the clock frequency of the processor, which speeds up the work of this most important section in terms of performance

128-bit floating point block: High floating point performance expands the rendering of 3D objects, gaming applications and scientific computing

128-bit integer block with SIMD engine: Accelerates video, speech, encryption, image and photo processing.

L1 Cache with Execution Trace Cache: Dramatically improves the efficiency of the instruction cache to maximize the performance of frequently accessed portions of code

Advanced Dynamic Execution Technology: Improved branch prediction improves the performance of all 32-bit applications by optimizing the instruction sequence

Temperature control: Used to protect motherboards, allowing you to determine the moment when the temperature exceeds the maximum allowable

Built-in Self Test (BIST): A single mechanism for checking firmware and large logic arrays errors as well as testing instruction cache, data cache, translation buffers, and ROM.

Test access port and boundary-scan engine based on IEEE 1149 standard. Allows testing Pentium 4 processor and its connection to the system through a standard interface.

A 100 (400) MHz system bus (Quad-pumped, QPB) was used, providing a bandwidth of 3.2 GB / s versus 133 MHz of a bus with a bandwidth of 1.06 GB / s in the Pentium III. In fact, with an increase in the number of steps, the CPU frequency increases, but the operations are processed longer. Thus, the Willamette has become "stupid" with increasing frequency; operations began to go through more steps, and the processing time for one instruction increased. So, the processor turned out to be weak, even with an excellent FSB, its performance did not differ much from that of Tualatin, and the price, including the chipset and RDRAM memory, did not please, and it was not in great demand.

Specifications: production technology: 0.18 microns; clock frequency: 1.3-2 GHz; first level cache: 8 +12 KB; cache of the second level using Advanced Transfer Cache technology 256 KB (full speed); CPU

32-bit; data bus 64-bit (400 MHz); Socket-423 and Socket-478; core voltage - 1.75 V.

To change the state of affairs in the mainstream and performance segment, Tualatin was left for Celeron, and Intel introduced a new Northwood core made using 0.13 micron technology. They are now 3 modifications: Northwood-A with 100 (400), Northwood-B 133 (533) MHz and Northwood-C 200 (800) MHz system bus. The only differences in the architecture are the 0.13-micron manufacturing technology and the L2 cache increased to 512 KB, which has brought Intel into the lead at the moment. The main rival - the Athlon XP processor on the Barton core - has approximately the same parameters, except for a smaller number of stages in the pipeline, and, accordingly, a lower frequency of the crystal and the system bus. Both processors have approximately the same performance.

Meanwhile, Intel transferred the value-segment to the P4 Willamette-128 core as well. This is a 32-bit superscalar CISC-core of IA-32 architecture, which is produced according to the technological standards of 0.18 microns, has a first-level cache of 8 KB for data and a trace cache for 12 thousand micro-ops, a long pipeline for 20 stages; the external bus has a capacity of 64 bits, a frequency of 100 (400) MHz, a quadruple data stream (equivalent to a frequency of 400 MHz). The L2 cache built into the core was 256 KB in the original Willamette, but the Celeron was cut down to 128 KB. Available with 1.7-2.4 GHz clock speeds. Performance is lower than AMD Duron based on Morgan and Applebred cores.

In 2003, Intel announced a new feature of the Northwood core - Hyper-Threading technology allows you to artificially parallel program code into several threads ("threads") and simultaneously execute them while emulating the presence of a second processor on a single die. In this case, all the idle CPU blocks are used to maximize the utilization of the CPU blocks.

The last desktop Pentium 4 based on the Northwood core was a model with a clock speed of 3.40 GHz and 512 KB of L2.2 cache. On February 2004, Intel announced a new Prescott core for Pentium 4, made using 0.09 micron technology with a 1 MB L2 cache. Processors with frequencies from 2.80 GHz to 3.40 GHz will be released on the basis of the new core. Models with 800 MHz bus with frequencies of 2.80, 3, 3.20 and 3.40 GHz have an E index in the marking, in order to distinguish them from models with the same frequency and bus on the Northwood core. In the third quarter of 2004, Pentium 4 with a clock speed of 3.80 GHz will be released, and by the end of the year it is quite possible to expect the conquest of the symbolic milestone of 4 GHz.

The main "features" of the new core were its complete redesign, a pipeline extended to 31 stages, a new fabrication technology using strained silicon technology and a CDO dielectric in interconnects, as well as 13 new instructions (SSE3), improved Hyper-Threading technology, transition prediction and preliminary fetching data into the cache, as well as power management.

In addition, the operations of multiplying integers have been accelerated, and additional write buffers have been introduced. In addition, the new product should support 64-bit instructions, which are not compatible with AMD 64-bit instructions and are blocked, at least for now. The new processor includes LaGrande hardware encryption technology, but software support will come later. The new crystal has an area of \u200b\u200b112 mm2 and contains 125 million transistors. Because of this, the thermal mode of the new processor has also changed - FMB 1.5 specification. The thermal package has now expanded its ranges: the older model will have a heat dissipation of 103 watts. This raises compatibility issues with most of the motherboards available. So far all processors have Socket 478, but due to increased power consumption it will soon be replaced by Socket 775 with 775 pins, respectively. Prices for this line range from $ 163 to $ 417, but it will soon catch up with prices for the Northwood line to stimulate demand.

In parallel, Intel is developing EPIC technology for its 64-bit server processors. This technology, by which modern Intel Itanium 2 processors are manufactured, implies complete parallelism of instructions sent by the compiler to the processor. This architecture is called IA-64.

However, the traditional IA-32 architecture has not yet fully exhausted itself, so its existence is assumed until 2006. It is too early to talk about the year 2005, because convergence is gaining momentum, and Moore's Law is still in effect. Although, in principle, it is already obvious that increasing the frequency and increasing the cache no longer bring the required performance gain, so the companies decided to rely on technology. An increase in the frequency while maintaining an increase in heat release is further impossible due to a sharp increase in the leakage currents of transistors. Since the microarchitecture cannot be improved indefinitely, and it makes no sense, it is obvious that the future lies in the integration of various technologies and capabilities into chips. So Intel in the server sector relies on multi-core, and in the desktop segment - on multithreading. AMD company, not wanting to invest huge investments in such research, "goes like a horse": it promotes SOI (Silicon-on-Insulator) production technology everywhere and relies on expanding the microarchitecture up to 64 bits, as well as on the HyperTransport bus.

2. Features of the production of microprocessors

It is known that existing CMOS transistors have many limitations and will not allow increasing processor frequencies in the near future as painlessly. At the end of 2003 at the Tokyo conference, Intel specialists made a very important statement about the development of new materials for semiconductor transistors of the future. First of all, we are talking about a new transistor gate dielectric with a high dielectric constant (the so-called "high-k" material), which will be used to replace the silicon dioxide (SiO2) used today, as well as new metal alloys compatible with the new gate dielectric ... The solution proposed by the researchers reduces the leakage current by 100 times, which makes it possible to get close to the implementation of a production process with a design standard of 45 nanometers. It is viewed by experts as a small revolution in the world of microelectronic technology.

To understand what this is about, let's first look at a conventional MOSFET, on the basis of which the most complex CPUs are made. The MOSFET is shown in Figure 2.

Figure 2 - MOSFET.

In it, a conductive polysilicon gate is separated from the transistor channel by the thinnest (only 1.2 nm or 5 atoms thick) layer of silicon dioxide (a material that has been used as a gate dielectric for decades).

Such a small thickness of the dielectric is necessary to obtain not only the small dimensions of the transistor as a whole, but also for its highest speed (charged particles move faster through the gate, as a result of which such a VT can switch up to 10 billion times per second)

Simplified - the closer the gate is to the transistor channel (that is, the thinner the dielectric), the "greater influence" in terms of speed it will have on the electrons and holes in the transistor channel. The appearance of the gate insulating layer is shown in Figure 3.

Figure 3 - External view of the gate insulating layer.

Therefore, the importance of the discovery by Intel scientists cannot be underestimated. After five years of research in the corporation's laboratories, they have developed a special material that replaces traditional silicon dioxide in the usual route of chip manufacturing. The requirements for such a material are very serious: high chemical and mechanical (at the atomic level) compatibility with silicon, ease of production in a single cycle of a traditional silicon process technology, but most importantly - low leakage and high dielectric constant.

If we are fighting leaks, then the thickness of the dielectric must be increased to at least 2-3 nm (see the figure above). In order to maintain the same transistor slope (dependence of current on voltage), it is necessary to proportionally increase the dielectric constant of the dielectric material. An insulator with a high dielectric constant is shown in Figure 4.

Figure 4 - Insulator with high dielectric constant.

If the permeability of bulk silicon dioxide is equal to 4 (or slightly less in ultrathin layers), then a reasonable value of the dielectric constant of the new "Intel" dielectric can be considered a value in the region of 10-12. Despite the fact that there are many materials with such a dielectric constant (capacitor ceramics or silicon monocrystals), factors of technological compatibility of materials are no less important here. Therefore, for the new high-k-material, a high-precision deposition process was developed, shown in Figure 5, during which one molecular layer of this material is formed in one cycle.

Figure 5 - Schematic of the high-precision process of applying the High-K layer.

Based on this picture, we can assume that the new material is also oxide. Moreover, monoxide, which means the use of materials mainly of the second group, for example, magnesium, zinc or even copper.

But the matter was not limited to the dielectric. It was necessary to change the material of the shutter itself - the usual polycrystalline silicon. The fact is that replacing silicon dioxide with a high-k-dielectric leads to problems of interaction with polycrystalline silicon (the band gap of a transistor determines the minimum voltages possible for it). These problems can be eliminated by using special metals for the gates of both types of transistors (n-MOS and p-MOS) in combination with a special technological process. This combination of materials achieves record-breaking transistor performance and uniquely low leakage currents, 100 times lower than current materials. In this case, there is no longer the temptation to use the much more expensive SOI (silicon on insulator) technology to combat leaks, as some large microprocessor manufacturers do. The characteristics of high-K transistors are shown in Figure 6.

Figure 6 - Characteristics of transistors with a High-K layer applied.

We also note another technological innovation from Intel - strained silicon technology, which is first used in 90nm Prescott and Dothan processors. Finally, Intel has detailed how strained silicon layers are formed in its CMOS structures. A CMOS cell consists of two transistors - n-MOS and p-MOS. A CMOS cell of two transistors is shown in Figure 7.

Figure 7 - CMOS cell of two transistors.

In the first (n-MOS) channel of the transistor (n-channel) conducts current using electrons (negatively charged particles), and in the second (p-MOS) - using holes (conditionally positively charged particles). Accordingly, the mechanisms of the formation of stressed silicon are different in these two cases. For the n-MOS transistor, an external coating with a layer of silicon nitride (Si3N4) is used, which, due to mechanical stresses, slightly (by a fraction of a percent) stretches (in the direction of current flow) the silicon crystal lattice under the gate, as a result of which the operating current of the channel increases by 10% (relatively speaking, it becomes more spacious for electrons to move in the direction of the channel). In p-MOS transistors, the opposite is true: a silicon-germanium (SiGe) compound is used as the substrate material (more precisely, only the drain and source regions), which slightly compresses the silicon crystal lattice under the gate in the direction of the channel. Therefore, it becomes "easier" for holes to "move" through the acceptor impurity atoms, and the operating current of the channel increases by 25%. The combination of both technologies gives 20-30% current amplification. Thus, the use of "strained silicon" technology in both types of devices (n-MOS and p-MOS) leads to a significant increase in the performance of transistors while increasing their production costs by only ~ 2% and allows you to create more miniature transistors of the next generations. Intel plans to use strained silicon for all future process technology down to 22nm. 6-transistor memory cell is shown in Figure 8.

Figure 8 - 6-transistor memory cell.

The low dielectric material is used as a dielectric for copper joints (see illustration) in all Intel processes from 0.13 micron. It reduces the amount of capacitance that occurs between the copper connections on the chip, which improves the transmission rate of internal signals and reduces power consumption. Intel is the first and so far only company to use this low-k material for interconnect insulation. Connections in a microcircuit created using the 90nm process technology are shown in Figure 9.

Figure 9 - Connections in a microcircuit created using the 90nm process technology.

Yes, we must admit that the success of Intel laboratories in the development of innovative semiconductor technology is impressive. Intel generally manages to stay one step ahead of competitors such as IBM, Motorola and Texas Instruments. On the other hand, this is not surprising - after all, Intel's development costs this year alone amounted to about $ 4.3 billion! And now the statements about the disadvantages and complexity of SOI technology, which Intel has already transferred on its own skin, and AMD just got busy with them, are becoming clear. Well, the huge scientific potential allows not only the company to look ahead into the future of microprocessor technologies for several years ahead, but also to predict changes in the world of technology and be an active participant in these changes. This is the price a company pays to make history with its own hands, and not be an outside observer of it. This is the true face of a technology leader.

3. Technological stages of microprocessor production

3.1 How chips are made

Chip production involves the application of thin layers with a complex "pattern" to silicon substrates. First, an insulating layer is created that acts like an electrical shutter. A photoresist material is then applied on top, and unwanted areas are removed using masks and high-intensity radiation. When the irradiated areas are removed, areas of silicon dioxide are exposed underneath, which is removed by etching. After that, the photoresist material is also removed, and we get a certain structure on the silicon surface. Then additional photolithography processes are carried out, with different materials, until the desired three-dimensional structure is obtained. Each layer can be doped with a certain substance or ions, changing the electrical properties. Windows are created in each layer in order to then bring metal connections.

As for the production of substrates, they must be cut into thin "pancakes" from a single single crystal-cylinder, so that later they can be easily cut into separate processor crystals. At each stage of production, complex testing is performed to assess the quality. Electrical probes are used to test each crystal on the substrate. Finally, the substrate is cut into individual cores, the non-working cores are immediately eliminated. Depending on the characteristics, the core becomes a particular processor and is wrapped in a package that makes it easier to install the processor on the motherboard. All functional blocks go through intensive stress tests.

1.2 It all starts with substrates

The first step in manufacturing processors is done in a clean room. By the way, it is important to note that such technological production represents the accumulation of huge capital per square meter. The construction of a modern plant with all the equipment can easily "fly away" 2-3 billion dollars, and it takes several months for test runs of new technologies. Only then can the plant mass-produce processors.

In general, the chip manufacturing process consists of several substrate processing steps. This includes creating the substrates themselves, which will eventually be cut into individual crystals.

1.3 Manufacturing of substrates

It all starts with growing a single crystal, for which a seed crystal is embedded in a bath of molten silicon, which is located just above the melting point of polycrystalline silicon. It is important that the crystals grow slowly (about a day) to ensure that the atoms are in the correct arrangement. Polycrystalline or amorphous silicon is composed of many different crystals that will lead to unwanted surface structures with poor electrical properties.

Once the silicon is melted, it can be doped with other substances that change its electrical properties. The whole process takes place in a sealed room with a special air composition so that silicon does not oxidize.

The single crystal is cut into "pancakes" using a diamond hole saw, which is very precise and does not create large irregularities on the surface of the substrates. Of course, in this case, the surface of the substrates is still not perfectly flat, so additional operations are required. The appearance of a single crystal is shown in Figure 10.

Figure 10 - External view of a single crystal.

First, using rotating steel plates and an abrasive material (such as aluminum oxide), a thick layer is removed from the substrates (a process called lapping). As a result, irregularities ranging from 0.05 mm to approximately 0.002 mm (2000 nm) are eliminated. Then round off the edges of each underlay as sharp edges can peel off layers. Further, the etching process is used, when using various chemicals (hydrofluoric acid, acetic acid, nitric acid) the surface is smoothed by about 50 microns. Physically, the surface does not deteriorate, since the whole process is completely chemical. It allows you to remove the remaining errors in the crystal structure, as a result of which the surface will be close to ideal.

The last step is polishing, which smoothes the surface to roughness, maximum 3 nm. Polishing is done with a mixture of sodium hydroxide and granular silica.

Today, microprocessor substrates are either 200 mm or 300 mm in diameter, which allows chip manufacturers to obtain multiple processors from each. The next step will be 450mm substrates, but they shouldn't be expected until 2013. In general, the larger the substrate diameter, the more chips of the same size can be produced. A 300 mm substrate, for example, provides more than twice as many processors as a 200 mm substrate.

1.4 Alloying, diffusion

We have already mentioned the doping that occurs during the growth of the single crystal. But alloying is carried out both with the finished substrate and during

the time of the photolithography processes is later. This allows changing the electrical properties of certain regions and layers, and not the entire structure of the crystal.

The dopant can be added via diffusion. Dopant atoms fill the free space inside the crystal lattice, between the silicon structures. In some cases, the existing structure can also be alloyed. Diffusion is carried out using gases (nitrogen and argon) or using solids or other sources of dopant.

Another approach to doping is ion implantation, which is very useful in altering the properties of a substrate that has been doped, since ion implantation occurs at ordinary temperatures. Therefore, existing impurities do not diffuse. You can apply a mask to the matte, which allows you to process only certain areas. Of course, one can talk about ion implantation for a long time and discuss the depth of penetration, activation of the additive at high temperatures, channel effects, penetration into oxide levels, etc., but this is beyond the scope of our article. The procedure can be repeated several times during production.

1.5 Create a mask

A photolithography process is used to create portions of an integrated circuit. Since it is not necessary to irradiate the entire surface of the substrate in this case, it is important to use so-called masks, which transmit high-intensity radiation only to certain areas. Masks can be compared to black and white negative. Integrated circuits have many layers (20 or more), and each layer requires its own mask.

A thin chrome film structure is applied to the surface of a quartz glass plate to create a pattern. At the same time, expensive instruments using an electron stream or a laser prescribe the necessary data of an integrated circuit, as a result of which we get a template from chromium on the surface of a quartz substrate. It is important to understand that each modification of the integrated circuit leads to the need to produce new masks, so the whole process of making edits is very costly. The appearance of the EUV mask is shown in Figure 11.

Figure 11 - External view of the EUV mask.

1.6 Photolithography

With the help of photolithography, a structure is formed on a silicon substrate. The process is repeated several times until many layers (more than 20) are created. Layers can consist of different materials, moreover, you also need to think over the connections with microscopic wires. All layers can be alloyed.

Before the photolithography process begins, the substrate is cleaned and heated to remove sticky particles and water. Then the substrate is coated with silicon dioxide using a special device. Next, a bonding agent is applied to the substrate to ensure that the photoresist material to be applied in the next step remains on the substrate. The photoresist material is applied to the middle of the substrate, which then begins to rotate at a high speed so that the layer is evenly distributed over the entire surface of the substrate. The substrate is then heated again. The principle of photolithography is shown in Figure 12.

Figure 12 - The principle of photolithography.

Then, through a mask, the cover is irradiated with a quantum laser, hard ultraviolet radiation, X-rays, beams of electrons or ions - all of these sources of light or energy can be used. Electron beams are mainly used to create masks, X-rays and ion beams for research purposes, and industrial production today is dominated by hard UV radiation and gas lasers. The types of radiation sources for the cover are shown in Figure 13.

Figure 13 - Types of cover radiation sources.

Hard UV radiation with a wavelength of 13.5 nm irradiates the photoresist material as it passes through the mask.

Projection time and focus are very important to obtain the desired result. Poor focusing will leave extra particles of photoresist material as some of the holes in the mask will not be properly irradiated. The same will happen if the projection time is too short. Then the structure of the photoresist material will be too wide, the areas under the holes will be underexposed. On the other hand, excessive projection times create too large areas under the holes and too narrow a photoresist material structure. It is usually very time consuming and difficult to adjust and optimize the process. An unsuccessful adjustment will lead to serious deviations in the connecting conductors.

A special stepping projection device moves the substrate to the desired position. Then a line or one section can be projected, most often corresponding to one processor die. Additional micro-installations can make additional changes. They can debug existing technology and optimize the workflow. Micro-installations typically operate on areas of less than 1 sq. mm, while conventional installations cover larger areas.

The etching and cleaning of the backing is shown in Figure 14.

Figure 14 - Etching and cleaning of the substrate.

The substrate then proceeds to a new stage where the weakened photoresist material is removed, allowing access to the silicon dioxide. There are wet and dry etching processes that treat areas of silicon dioxide. Wet processes use chemical compounds, and dry processes use gas. A separate process is the removal of the residues of the photoresist material. Manufacturers often combine wet and dry removal so that the photoresist material is completely removed. This is important because the photoresist material is organic and, if not removed, can lead to defects on the substrate.

After etching and cleaning, you can proceed to inspect the substrate, which usually happens at each important stage, or transfer the substrate to a new photolithography cycle.

The substrate test is shown in Figure 15.

Figure 15 - Substrate test is shown in the figure.

Finished substrates are tested in so-called probe installations. They work with the entire substrate. Probe contacts are superimposed on the contacts of each crystal, which allows electrical tests to be performed. All functions of each core are tested using software.

Substrate cutting is shown in Figure 16.

Figure 16 - Cutting of the substrate is presented.

By cutting, individual cores can be obtained from the substrate. At the moment, the probe control installations have already revealed which crystals contain errors, so after cutting they can be separated from the good ones. Previously, damaged crystals were physically marked, now there is no need for this, all information is stored in a single database.

The functional core must then be bonded to the processor packaging using an adhesive material.

The substrate wiring is shown in Figure 17.

Figure 17. - Wired substrate connection.

Then you need to make wire connections connecting the contacts or legs of the package and the crystal itself. Gold, aluminum or copper connections can be used.

The processor packaging is shown in Figure 18.

Figure 17 - Processor packaging.

Most modern processors use plastic wrap with a heat spreader. Typically, the core is wrapped in ceramic or plastic to prevent damage. Modern processors are equipped with a so-called heat spreader, which provides additional protection for the crystal, as well as a large contact surface with the cooler.

The last stage involves testing the processor, what happens at elevated temperatures, in accordance with the processor specifications. The processor is automatically installed into the test socket, after which all the necessary functions are analyzed.

Conclusion

The manufacturing of microprocessors has two important steps. The first is the manufacturing of the substrate, which AMD and Intel are doing in their factories. This includes imparting conductive properties to the substrate. The second stage is the test of substrates, assembly and packaging of the processor. The latter operation is usually performed in less expensive countries. If you look at Intel processors, you will find that the packaging was done in Costa Rica, Malaysia, the Philippines, etc.

AMD and Intel today are trying to produce products for the maximum number of market segments, and based on the smallest possible range of crystals. The Intel Core 2 Duo line of processors is a perfect example. There are three processors codenamed for different markets: Merom for mobile applications, Conroe for the desktop version, Woodcrest for the server version. All three processors are built on the same technology base, which allows the manufacturer to make decisions in the last stages of production. Features can be enabled or disabled, and the current clock rate gives Intel an excellent chip yield. If the market demand for mobile processors has increased, Intel may focus on releasing Socket 479 models. If the demand for desktop models has increased, then the company will test, validate and package crystals for Socket 775, while server processors are packaged for Socket 771. So even quad-core processors are being created: two dual-core crystals are installed in one package, so we get four cores.

Bibliography

1. Muller S. Modernization and repair of PCs, Moscow: 2003.

2. Asmakov S. Technologies of element base creation, Computer-Press, No. 1, p. 29, 2007.

3. Asmakov S. New technologies, Computer-Press, No. 1, p. 36 2007.

4. Pakhomov S. Modern processors for PC, Computer-Press, No. 12, p. 22, 2006.

5. Pakhomov S. Solutions based on Intel Itanium 2 processors, No. 9, p. 12, 2006.

Processor manufacturing

The main chemical used in the manufacture of processors is silicon, the most abundant element on earth after oxygen. It is the basic component of coastal sand (silicon dioxide); however, in this form, it is not suitable for the manufacture of microcircuits. To use silicon as a material for making mi

cross-circuits, a lengthy technological process is required, which begins with the production of pure silicon crystals by the Czochralski method. According to this technology, the raw material, which is mainly quartz rock, is converted in electric arc furnaces into metallurgical silicon. Then, to remove impurities, the resulting silicon is melted, distilled and crystallized in the form of semiconductor ingots with very high purity (99.999999%). After mechanical cutting of the ingots, the resulting billets are loaded into quartz crucibles and placed in electric drying ovens for drawing crystals, where they are melted at temperatures exceeding 2500 ° Fahrenheit. In order to prevent the formation of impurities, drying ovens are usually installed on a thick concrete base. The concrete base, in turn, is mounted on shock absorbers, which can significantly reduce vibration, which can negatively affect crystal formation. Once the workpiece begins to melt, a small, slowly rotating seed crystal is placed in the molten silicon. As the seed crystal moves away from the surface of the melt, silicon filaments follow it, which, when solidified, form a crystalline structure. By varying the speed of movement of the seed crystal (10-40 mm per hour) and the temperature (approximately 2500 ° F), we obtain a silicon crystal of small initial diameter, which is then grown to the desired size. Depending on the size of the microcircuits being manufactured, the grown crystal reaches 8-12 inches (20-30 mm) in diameter and 5 feet (about 1.5 m) in length.

The weight of the grown crystal reaches several hundred pounds. The workpiece is inserted into a 200mm diameter cylinder (current standard), often with a flat cut on one side for positioning and machining accuracy. Then each workpiece is cut with a diamond saw into more than a thousand circular substrates less than a millimeter thick (Figure 2). After that, the substrate is polished until its surface becomes mirror-smooth. Chip manufacturing uses a process called photolithography. The technology of this process is as follows: layers of different materials are deposited on the semiconductor, which serves as the basis of the chip; thus, transistors, electronic circuits and conductors (tracks) are created through which signals propagate. At the intersection points of specific circuits, you can create a transistor or switch (gate). The photolithographic process begins with coating the substrate with a semiconductor layer with special additives, then this layer is coated with a photoresist chemical composition, and then the image of the microcircuit is projected onto the now light-sensitive surface. As a result of adding donor impurities to silicon (which, naturally, is a dielectric), a semiconductor is obtained. The projector uses a special photomask (mask), which is, in fact, a map of this particular layer of the microcircuit. (The Pentium III chip contains five layers; other modern processors may have six or more layers. When developing a new processor, you will need to design a photomask for each layer of the chip.) As it passes through the first photomask, light is focused on the surface of the substrate, leaving an imprint of that layer. Then a special device moves the substrate somewhat, and the same photomask (mask) is used to print the next microcircuit. After the microcircuits are printed on the entire substrate, the caustic alkali will wash away the areas where the light affected the photoresist substance, leaving prints of the photomask (mask) of a particular layer of the microcircuit and interlayer connections (connections between layers), as well as signal paths. After that, another layer of semiconductor is applied to the substrate and again a little photoresist substance on top of it, then the next photomask (mask) is used to create the next layer of the microcircuit. In this way, layers are applied one on top of the other until the microcircuit is completely manufactured.

The final mask adds a so-called metallization layer used to connect all the transistors and other components. Most microcircuits use aluminum for this layer, but recently copper has been used. For example, copper is used in the production of AMD processors at the factory in Dresden. This is due to the better conductivity of copper compared to aluminum. However, for the ubiquitous use of copper, it is necessary to solve the problem of its corrosion.

When the processing of the circular substrate is completed, the maximum possible number of microcircuits will be printed on it by the photo method. The microcircuit is usually in the form of a square or rectangle, some "free" areas remain along the edges of the substrate, although manufacturers try to use every square millimeter of the surface. The industry is going through another transition period in the production of microcircuits. Recently, there has been a tendency towards an increase in the diameter of the substrate and a decrease in the overall dimensions of the crystal, which is reflected in a decrease in the dimensions of individual circuits and transistors and the distance between them. In late 2001 and early 2002, there was a transition from 0.18 to 0.13 micron technology, replacing aluminum intercrystals with copper, and the diameter of the substrate increased from 200 mm (8 inches) to 300 mm (12 inches). Increasing the diameter of the substrate to 300 mm doubles the number of chips produced. The use of 0.13-micron technology allows a larger number of transistors to be placed on the chip while maintaining its acceptable size and a satisfactory percentage of product yield. This means that the trend towards an increase in the amount of cache memory embedded in the processor die continues. As an example of how this can affect the parameters of a particular microcircuit, consider the Pentium 4 processor.

The diameter of a standard substrate used in the semiconductor industry for many years is 200 mm, or approximately 8 inches (Fig). Thus, the substrate area reaches 31,416 mm2. The first version of the Pentium 4 processor, manufactured on a 200mm substrate, contained a 0.18-micron Willamette core with aluminum pins located on a die with an area of \u200b\u200babout 217mm2. The processor contained 42 million transistors. A 200 mm (8-inch) substrate could accommodate up to 145 such microcircuits. The 0.13-micron Northwood Pentium 4 processors incorporate copper circuitry on a 131 mm2 die. This processor already contains 55 million transistors. Compared to the Willamette version, the Northwood core has twice the amount of on-board L2 cache (512KB), which explains the higher number of transistors contained. The use of 0.13-micron technology allows the die size to be reduced by about 60%, which makes it possible to accommodate up to 240 chips on the same 200-mm (8-inch) substrate. As you remember, only 145 Willamette crystals could fit on this substrate. In early 2002, Intel began manufacturing Northwood dies on a larger, 300mm substrate, 70,686mm2. The area of \u200b\u200bthis substrate is 2.25 times the area of \u200b\u200bthe 200 mm substrate, which makes it possible to practically double the number of microcircuits placed on it. If we talk about the Pentium 4 Northwood processor, then up to 540 microcircuits can be placed on a 300 mm substrate. The use of modern 0.13-micron technology in combination with a larger diameter substrate has allowed more than 3.7 times the production of Pentium 4 processors. This is largely due to this fact that modern microcircuits are often cheaper than those of previous versions. In 2003, the semiconductor industry switched to 0.09 micron technology. When a new production line is introduced, not all chips on the substrate will be usable. But as the production technology of this microcircuit improves, the percentage of suitable (working) microcircuits will also increase, which is called the yield of good ones. At the beginning of the release of new products, the yield may be below 50%, but by the time the release of this type of product is discontinued, it is already 90%. Most chip makers hide the actual yield figures, since knowing the actual ratio of good to defective ones can play into the hands of their competitors. If a company has concrete data on how quickly its competitors' yield is increasing, it can adjust chip prices or plan production to increase its market share at a critical time. For example, during 1997 and 1998 AMD had low yield and the company lost significant market share. Although AMD made efforts to solve this problem, it still had to sign an agreement under which IBM Microelectronics was to manufacture and supply AMD with some of its own microprocessors. Upon completion of the processing of the substrate, a special device checks each microcircuit on it and marks the defective ones, which will later be rejected. The microcircuits are then cut from the substrate using a high-performance laser or diamond saw. When the dies are cut from the substrates, each microcircuit is tested separately, packaged and tested again. The packaging process is called bonding: after the crystal is placed in the case, a special machine connects the crystal's leads to the pins (or contacts) on the microcircuit case with tiny gold wires. Then the microcircuit is packed in a special bag - a container, which essentially protects it from the adverse effects of the external environment. After the pins of the crystal are connected to the pins on the body of the microcircuit, and the microcircuit is packed, a final test is performed to determine correct operation and rated speed. Different microcircuits of the same series often have different speed. Special testing devices force each microcircuit to work in different conditions (at different pressures, temperatures and clock frequencies), determining the values \u200b\u200bof the parameters at which the correct functioning of the microcircuit stops. In parallel, the maximum speed is determined; after that, the microcircuits are sorted by speed and distributed among the receivers: microcircuits with similar parameters fall into the same receiver. For example, Pentium 4 microcircuits 2.0A, 2.2, 2.26, 2.24 and 2.53 GHz are the same microcircuit, i.e. they were all printed from the same photomask, in addition , they are made from the same workpiece, but at the end of the production cycle they were sorted by speed.

LECTURE PLAN

1. Seven generations of processors

2. Production technology

3. Technological stages of microprocessor production

1. Seven generations of processors

The first generation (8086 and 8088 processors and 8087 math coprocessor) laid the architectural foundation - a set of "unequal" 16-bit registers, a segment addressing system within 1 MB with a wide variety of modes, an instruction system, an interrupt system, and a number of other attributes. The processors used "small" pipelining: while some nodes were executing the current command, the prefetch block fetched the next one from memory.

The third generation (80286 and 80287 coprocessor) added the so-called "protected mode" to the family, which allows using virtual memory up to 1 GB in size for each task using addressable physical memory within 16 MB. Protected mode has become the basis for building multitasking operating systems, in which a privilege system strictly regulates the relationship of tasks with memory, the operating system, and with each other. It should be noted that the performance of the 80286 processors has increased not only due to the increase in clock frequency, but also due to significant improvements in the pipeline.

The third generation (80386/80387 with "suffixes" DX and SX, which determine the width of the external bus) was marked by the transition to a 32-bit architecture. In addition to expanding the range of represented values \u200b\u200b(16 bits represent integers in the range from 0 to 65535 or from –32768 to +32767, and 32 bits - more than four billion), the capacity of the addressable memory has increased. The Microsoft Windows operating system began to be widely used with these processors.

The fourth generation (80486 also DX and SX) did not add major architectural changes, but a number of measures were taken to improve performance. In these processors, the execution pipeline has been significantly complicated. Manufacturers abandoned the external coprocessor - it began to be placed on the same crystal with the central one.

The fifth generation (Pentium processor from Intel and K5 from AMD) gave a superscalar architecture. To quickly supply pipelines with instructions and data from memory, the data bus of these processors is made 64-bit. Later this generation had an extension ММХ (Matrics Math Extensions instruction set) - a set of commands for extending matrix mathematical operations (originally Multimedia Extension instruction set) - a set of commands for a multimedia extension)). Traditional 32-bit processors can add two 8-bit numbers, placing each number in the lower-order bits of 32-bit registers. In this case, the 24 most significant bits of the registers are not used, and therefore, it turns out that with one addition operation ADD, simply the addition of two 8-bit numbers is carried out. MMX commands operate with 64 bits at once, where eight 8-bit numbers can be stored, and it is possible to add them with other 8-bit numbers in one ADD operation. MMX registers can also be used to simultaneously add four 16-bit words or two 32-bit long words. This principle is called SIMD (Single Instruction / Multiple Data - "one instruction stream / many data streams"). The new commands were mainly intended to speed up the execution of multimedia programs, but use them with multimedia technology. A new type of arithmetic has appeared in MMX - with saturation: if the result of an operation does not fit in the bit grid, then overflow (or "anti-overflow") does not occur, but the maximum (or minimum) possible value of the number is set.

The sixth generation of processors originated with the Pentium Pro and continued in the Pentium III, Celeron and Xeon processors (from AMD, the K6, K6-2, K6-2 +, K6-III processors can serve as an example). The basis here is dynamic execution, execution of commands not in the order prescribed by the program code, but in the way that will be more convenient for the processor. It should be noted here that there are similarities between the fifth and sixth generation processors, namely, the addition of the fifth generation expansion was supplemented by the MMX expansion, the sixth generation received extensions that increase the MMX capabilities. AMD has this extension 3dNnoy !, and Intel has SSE (Streaming SIMD Extensions).

The seventh generation began with AMD's Athlon processor. The processor had the characteristics conditioning the development superscalarity and super pipelines... Later, Intel also released its seventh generation Pentium 4 processor.

2. Production technology

Currently, we can observe an interesting trend in the market: on the one hand, manufacturing companies are trying to rapidly introduce new technical processes and technologies into their products, on the other hand, there is an artificial limitation of the growth of processor frequencies. This is due to the fact that the feeling of incomplete readiness of the market for the next change of processor families affects, and the manufacturers have not yet received enough profit from the sales of the CPUs produced now. It should be noted here that the price of the finished product is fundamental in comparison with other interests for companies. However, great importance in reducing the rate of development of microprocessors is associated with the understanding of the need to introduce new technologies that will increase productivity with a minimum amount of technological costs

Manufacturers had to solve a number of problems in the transition to new technical processes. The 90nm technology norm has proven to be a significant technology hurdle for many chip manufacturers. This is confirmed by TSMC, this company is engaged in the production of chips for many major manufacturers of the market, namely AMD, nVidia, ATI, VIA. For a long time, she could not debug the production of chips using 0.09 micron technology, which led to a low yield of suitable crystals. This led AMD to postpone the release of its SOI (Silicon-on-Insulator) processors for a long time. This is due to the fact that it was on this dimension of the elements that the disadvantages that were not previously perceptible appeared, such as leakage currents, a large spread of parameters and an exponential increase in heat release. One alternative solution is the use of SOI silicon on insulator technology, which AMD recently introduced in its 64-bit processors. However, it cost her a lot of effort and overcoming a considerable number of technological barriers. But it should be noted that this technology has many advantages that can compensate for its shortcomings. The essence of this technology is quite logical - the transistor is separated from the silicon substrate by another thin insulator layer. The positive qualities include. The absence of uncontrolled movement of electrons under the channel of the transistor, affecting its electrical characteristics - time. After supplying the unlocking current to the gate, the time of channel ionization to the working state, until the moment when the operating current flows through it, decreases, this entails an improvement in the second key parameter of the transistor performance, the time of its on / off. It is also possible, at the same speed, to simply lower the unlocking current - three. Or find some solution between the possibility of increasing the speed of work and the possibility of reducing the voltage. While maintaining the same unlocking current, the increase in transistor performance can be up to 30%, if you leave the frequency the same, focusing on energy saving, in this case the performance can be up to 50%. As a result, the characteristics of the channel become more predictable, and the transistor itself becomes more resistant to sporadic errors, an example of which are cosmic particles entering the channel substrate and unexpectedly ionizing it. Getting into the substrate located under the insulator layer, they do not affect the operation of the transistor in any way. The only drawback of SOI is that it is necessary to decrease the depth of the emitter / collector region, which in turn affects the increase in its resistance as the thickness decreases.

Another reason that contributed to the slowdown in frequency growth is the low activity of manufacturers in the market. For example, each AMD company worked on the widespread introduction of 64-bit processors, Intel during this period improved a new technical process, debugging for an increased yield of suitable crystals.

The introduction of new technologies into technical processes is obvious, but it becomes more and more difficult for technologists each time. The first Pentium processors (1993) were produced using the 0.8 µm process technology, then 0.6 µm each. In 1995, for the first time for 6th generation processors, the 0.35 micron technical process was used. In 1997, it changed to 0.25 microns, and in 1999 - to 0.18 microns. Modern processors are made using the 0.13 and 0.09 micron technologies introduced in 2004.

It is necessary to describe the structure of the transistor itself, namely, a thin layer of silicon dioxide, an insulator located between the gate and the channel, and performing the function of a barrier for electrons, preventing leakage of the gate current. Accordingly, the thicker this layer, the better it performs its insulating functions, but it is an integral part of the channel, and it is no less obvious that if manufacturers are going to reduce the channel length (transistor size), then its thickness must be reduced at a very fast pace. Over the past several decades, the thickness of this layer has averaged about 1/45 of the entire length of the channel. But this process has its end - as the same Intel claimed, if you continue to use SiO2, as it has been over the past 30 years, the minimum layer thickness will be 2.3. nm, otherwise the leak will become simply unrealistic. Until recently, nothing has been done to reduce the subchannel leakage, at present the situation is beginning to change, since the operating current, along with the gate response time, is one of the two main parameters characterizing the speed of the transistor, and the leakage in the off state is directly reflected on it ( on maintaining the required efficiency of the transistor). It is necessary, accordingly, to increase the operating current, with all the ensuing consequences.

The main stages of production

Manufacturing of a microprocessor is a complex process that includes more than 300 stages. Microprocessors are formed on the surface of thin circular silicon wafers - substrates, as a result of a certain sequence of various processing processes using chemicals, gases and ultraviolet radiation.

Substrates are usually 200 millimeters in diameter. However, Intel has already switched to 450mm wafers. Switching to larger diameter plates will reduce the cost of chip production, improve energy efficiency and reduce emissions of harmful gases into the atmosphere. The surface area of \u200b\u200b450mm wafers is more than double that of 300mm wafers. As a result, twice as many finished products can be produced from a single 450 mm substrate.

The wafers are made from silicon, which is refined, melted and grown into long cylindrical crystals. The crystals are then cut into thin plates and polished until their surfaces are mirror-smooth and free from defects. Then, sequentially, cyclically repeating thermal oxidation, photolithography, impurity diffusion, epitaxy are performed.

In the process of manufacturing microcircuits, the thinnest layers of materials are applied to the blank plates in the form of carefully calculated patterns. One plate fits up to several hundred microprocessors. The whole process of manufacturing processors can be divided into several stages: growing silicon dioxide and creating conductive regions, testing and manufacturing.

Growing silicon dioxide and creating conductive regions

The microprocessor manufacturing process begins by "growing" an insulating layer of silicon dioxide on the surface of a polished plate. This stage is carried out in an electric oven at a very high temperature. The thickness of the oxide layer depends on the temperature and time that the plate spends in the oven.

This is followed by photolithography - a process during which a schematic drawing is formed on the surface of the plate. First, a temporary layer of a photosensitive material is applied to the plate - a photoresist, onto which an image of transparent areas of the template, or photomask, is projected using ultraviolet radiation. Masks are made during processor design and are used to generate circuit patterns in each layer of the processor. Under the influence of radiation, the exposed areas of the photolayer become soluble, and they are removed with the help of a solvent (hydrofluoric acid), revealing the silicon dioxide underneath.

The exposed silica is removed by a process called etching. Then the remaining photolayer is removed, as a result, a pattern of silicon dioxide remains on the semiconductor wafer. As a result of a number of additional operations of photolithography and etching, polycrystalline silicon with the properties of a conductor is also applied to the wafer. During the next operation, called "doping", the exposed areas of the silicon wafer are bombarded with ions of various chemical elements, which form negative and positive charges in the silicon, which change the electrical conductivity of these areas.

The imposition of new layers with subsequent etching of the circuit is carried out several times, while for the interlayer connections in the layers "windows" are left, which are filled with metal, forming electrical connections between the layers. Intel used copper conductors for its 0.13 micron manufacturing process. Intel used aluminum for its 0.18 micron manufacturing process and previous generation processes. Both copper and aluminum are good conductors of electricity. When using the 0.18-micron technical process, 6 layers were used, while introducing the 90 nm technical process in 2004, 7 layers of silicon were used.

Each layer of the processor has its own pattern, together all these layers form a three-dimensional electronic circuit. The application of layers is repeated 20 - 25 times over several weeks.

Testing

In order to withstand the stresses that the substrates are subjected to during the deposition of layers, silicon wafers must be initially thick enough. Therefore, before cutting the plate into separate microprocessors, its thickness is reduced by 33% using special processes and contaminants are removed from the reverse side. After that, a layer of a special material is applied to the reverse side of the "processed" plate, which improves the subsequent fastening of the crystal to the case. This layer provides electrical contact between the back surface of the integrated circuit and the package after assembly.

After that, the plate is tested to check the quality of all processing operations. To determine the correctness of the processor, their individual components are checked. If a malfunction is detected, the data obtained is analyzed to identify the stage at which the error occurred.

Then, electrical probes are connected to each processor and power is supplied. The processors are tested by the computer, it determines whether the characteristics of the manufactured processors meet the specified parameters.

Manufacturing of the case

After testing, the wafers are sent to an assembly plant, where they are cut into small rectangles, each containing an integrated circuit, using a special precision saw. Non-working crystals are discarded.

Then each crystal is placed in an individual case. The housing protects the crystal from external influences and provides its electrical connection to the board on which it will be installed. Tiny balls of solder, located at specific points on the crystal, are soldered to the electrical leads of the package. At this stage, electrical signals can go from board to chip and vice versa.

After installing the crystal in the case, the processor is retested to determine its performance. Defective processors are discarded, and serviceable processors are subjected to stress tests: the effects of various temperature and humidity conditions, as well as electrostatic discharges. After each stress test, the processor is tested to determine its functional state. Then the processors are sorted according to their behavior at different clock frequencies and supply voltages.

3. Technological stages of microprocessor production

How chips are made

Chip production involves the application of thin layers with a complex "pattern" to silicon substrates. First, an insulating layer is created that acts like an electrical shutter. The substrates are cut into a single crystal-cylinder with thin "pancakes", so that later they can be easily cut into separate processor crystals. Electrical probes are used to test each crystal on the substrate. Finally, the substrate is cut into individual cores, non-working cores are immediately discarded. Depending on the characteristics, the core becomes a particular processor and is wrapped in a package that makes it easier to install the processor on the motherboard. All functional blocks go through intensive stress tests.

It all starts with substrates

The first step in manufacturing processors is done in a clean room. It should be noted that this is a very capital intensive production. More than $ 2-3 billion can be spent on the construction of a modern plant with all the equipment. Only after full adjustment and testing of the equipment can the plant produce the processors in series.

In general, the chip manufacturing process consists of a series of substrate processing steps. This includes the creation of the substrates themselves, which will subsequently be cut into individual crystals.

Substrate production

The first stage is growing a single crystal. For this, a seed crystal is embedded in a bath of molten silicon, which is located just above the melting point of polycrystalline silicon. It is important that the crystals grow slowly for about a day to ensure the correct arrangement of the atoms. Polycrystalline or amorphous silicon is composed of many different crystals that will lead to unwanted surface structures with poor electrical properties.

Once the silicon is melted, it can be doped with other substances that change its electrical properties. The whole process takes place in a sealed room with a special air composition so that silicon does not oxidize.

The single crystal is cut into "pancakes" using a circular high-precision diamond saw that does not create large irregularities on the surface of the substrates. At the same time, the surface of the substrates is still not perfectly flat, so additional operations are required. The appearance of single crystals can be seen in Figure 1.

Figure: 1. Appearance of a single crystal

First, using rotating steel plates and an alumina abrasive, a thick layer is removed from the substrates (a process called lapping). As a result, irregularities ranging from 0.05 mm to approximately 0.002 mm (2000 nm) are eliminated. Then round off the edges of each underlay as sharp edges can peel off layers. Further, the etching process is used, when using various chemicals (hydrofluoric acid, acetic acid, nitric acid) the surface is smoothed by about 50 microns. Physically, the surface does not deteriorate, since the whole process is completely chemical. It allows you to remove the remaining errors in the crystal structure, as a result of which the surface will be close to ideal.

The last step is polishing, which smooths the surface to roughness, maximum 3 nm. Polishing is carried out using a mixture of sodium hydroxide and granular silica.

Currently, microprocessor substrates have a diameter of 300 or 450 mm, which allows chip manufacturers to obtain multiple processors from each of them. In general, the larger the diameter of the substrate, the more chips of the same size can be produced. A 300mm substrate, for example, provides more than twice the number of processors than a 200mm.

Doping and diffusion

Doping is performed both with the finished substrate and during photolithography processes. This makes it possible to change the electrical properties of certain regions and layers, and not the entire structure of the crystal.

The dopant can be added by diffusion. Dopant atoms fill the free space inside the crystal lattice, between the silicon structures. In some cases, the existing structure can also be alloyed. Diffusion is carried out using gases (nitrogen and argon) or using solids or other sources of dopant.

Mask creation

To create sections of an integrated circuit, a photolithography process is used. In this case, it is not necessary to irradiate the entire surface of the substrate, in such cases it is important to use the so-called masks, which transmit high-intensity radiation only to certain areas. Masks can be compared to black and white negative. Integrated circuits have many layers (20 or more), and each layer requires its own mask.

A thin chrome film structure is applied to the surface of a quartz glass plate to create a pattern. At the same time, expensive instruments using an electron flow or a laser prescribe the necessary IC data, as a result of which a chrome template is obtained on the surface of the quartz substrate. It should be noted that any change in the integrated circuit leads to the need to produce new masks, so the whole process of making edits is very expensive.

Photoligraphy makes it possible to form a structure on a silicon substrate. The process is repeated several times until many layers are created. The layers can include different materials, here also the connection with microscopic wires is provided. Before starting the photolithography process, the substrate is cleaned and heated to remove sticky particles and water. At the next stage, the substrate is coated with silicon dioxide using a special device. Next, a bonding agent is applied to the substrate to ensure that the photoresist material to be applied in the next step remains on the substrate. The photoresist material is applied to the middle of the substrate, which then begins to rotate at a high speed so that the layer is evenly distributed over the entire surface of the substrate. Then the substrate is heated again. The photolithography process is shown in Figure 2.

Figure: 2. The photolithography process

Then, through a mask, the cover is irradiated with a quantum laser, hard ultraviolet radiation, X-rays, beams of electrons or ions - all of these sources of light or energy can be used. Electron beams are mainly used to create masks, X-rays and ion beams for research purposes, and industrial production today is dominated by hard UV radiation and gas lasers.

Hard UV light with a wavelength of 13.5 nm irradiates the photoresist material while passing through the mask. Projection and focusing times are very important for the desired results. Poor focusing will leave extra particles of photoresist material as some of the holes in the mask will not be properly irradiated. A similar situation will happen if the projection time is too short. Then the structure of the photoresist material will be too wide, the areas under the holes will be underexposed. However, excessive projection time creates too large areas under the holes and too narrow a photoresist material structure. This is the complexity of the regulation of the production process. Incorrect adjustment will lead to serious deviations in the connecting conductors. A special stepping projection device moves the substrate in the desired position. After that, you can project a line or one section, in most cases corresponding to one processor crystal. Additional micro-installations can make additional changes. For example, debug existing technology and optimize the process technology. Micro-installations typically operate on areas of less than 1 sq. mm, while conventional installations cover larger areas.

There are wet and dry etching processes that treat areas of silicon dioxide. Wet processes use chemical compounds, and dry processes use gas. A separate process is the removal of the residues of the photoresist material. Manufacturers often combine wet and dry removal so that the photoresist material is completely removed. This is important because the photoresist material is organic and, if not removed, can lead to defects on the substrate.

After etching and cleaning, you can proceed to inspect the substrate, which usually happens at each important stage, or transfer the substrate to a new photolithography cycle. Checking the substrates is shown in Figure 3.

Figure: 3. Inspection of substrates

Testing of finished substrates is carried out on probe control installations that work with the entire substrate. Probe contacts are superimposed on the contacts of each crystal, which allows electrical tests to be performed. All functions of each core are tested using software. The process of cutting the substrate is shown in Figure 4.

Figure: 4. The process of cutting the substrate

By cutting the support, individual cores are obtained. If defective crystals (containing errors) are found, they are separated from the good ones. Previously, damaged crystals were physically marked, now there is no need for this, all information is stored in a single database.

Further, the functional core must be placed in a processor package, for which an adhesive material is used. After that, you need to make wire connections connecting the legs of the package and the crystal itself (Figure 5). For this, gold, aluminum or copper connections are used.

Figure: 5. Wired substrate connection

Most modern processors use plastic packaging with heat distribution... In particular, the core is packed in ceramic or plastic packaging, this helps to prevent mechanical damage. Modern processors are equipped with a heat spreader, devices that provide heat dissipation and chip protection (Figure 6).

Figure: 6. Processor packaging

The last step is testing the processor, which is done at elevated temperatures, in accordance with the processor's specifications. The processor is automatically installed into the test socket, after which all the necessary functions are analyzed.

Big things start small. This statement is true for many things, but this article will talk about the manufacture of microprocessors, which are stuffed with a variety of household appliances that surround you, from smartphones to refrigerators.

Preparation of raw materials

Computer chips of the most complex structure, capable of performing instant calculations, are born in huge crucibles of quartz glass, filled to the brim with sand that has undergone multi-stage cleaning.

First of all, "technical" silicon is obtained from the sand collected in some quarry by adding carbon to the mineral at a high temperature. The resulting silicon reaches 98% purity, but is still completely unsuitable for use in the electronics industry and requires additional chlorine treatment to become "electronic silicon". In the course of a cascade of chemical reactions with chlorine, silicon is literally synthesized anew, getting rid of the last signs of impurities.

Only then is the crucible with the purest electronic silicon placed in a sealed furnace filled with argon. Of course, it would be possible to evacuate air from it, but creating an ideal vacuum on earth is very difficult, if not impossible, and from a chemical point of view, argon gives almost the same effect. This inert gas replaces oxygen, protecting the composition from oxidation, and itself does not react with silicon in the crucible.

Only after that, the former sand heats up to 1420 degrees Celsius, which is only 6 degrees above its melting point. For this, a graphite heater is used. The choice of material, as in the case of the crucible quartz, is due to the fact that graphite does not react with silicon and, therefore, cannot contaminate the material of the future processor.

A thin silicon seed crystal, the size and shape of a pencil, is dropped into the heated crucible. He must start the crystallization process. The rest can be reproduced at home with a solution of salt, sugar, citric acid or, for example, copper sulfate. The cooling solution begins to crystallize around the seed point, forming an ideal molecular lattice. This is how salt crystals are grown, and this is how silicon grows.

The silicon seed crystal is gradually lifted out of the crucible at a speed of about one and a half millimeters per minute, and with it the growing single crystal rises from the solution. Crystal growth is slow and takes an average of 26 hours per crucible, so the production works around the clock.

During this time, a "boule" is formed - a solid cylindrical crystal 300 millimeters in diameter, up to 1-2 meters long and weighing about 100 kilograms. If you look at it under a strong magnification, you will see a strict structure - an ideal crystal lattice of silicon atoms, completely uniform throughout the entire volume.

The crystal is so strong that its weight can withstand a thread with a diameter of only 3 millimeters. So, the finished workpiece for the processors is pulled out of the crucible by the same seed crystal.

However, the "boule" is handled more carefully than with an antique vase, the crystal can withstand enormous tensile stress, but is extremely fragile.

After chemical and fluoroscopic examination to check the purity of the crystal and the correctness of the molecular lattice, the workpiece is placed in a silicon cutting machine. She slices the crystal into wafers about 1 millimeter thick using a diamond-coated wire saw.

Of course, not complete without damage. No matter how sharp the saw, after cutting, microscopic defects remain on the surface of the plates. So the slicing is followed by the polishing step.

But even after being processed in a powerful grinding machine, the silicon wafers are still not smooth enough to be used for the production of microchips. Therefore, the polishing is repeated over and over again using chemicals.

The result is a surface in comparison to which the mirror resembles coarse sandpaper. Such a plate without breaks and microdefects becomes the basis for millions of microelectronic devices that form a microcircuit. Dust-free, silicon disks, which are commonly called "wafer" or "waffle" in sealed containers, are sent to the clean room.

In a clean room

In 1958, the inventor of the integrated circuit, Jack Kirby, managed to make a breakthrough by placing one transistor on his circuit. Nowadays, the number of logical elements of a microprocessor has exceeded one billion and continues to double every two years in accordance with Moore's Law.

Working with such microscopic parts poses a serious challenge for chip manufacturers, since even a single speck of dust can ruin a future product. Therefore, workshops with an area of \u200b\u200ba couple of thousand square meters are completely isolated from the outside world, equipped with the most sophisticated air purification and air conditioning systems that make it 10,000 times cleaner than in a surgical ward.

All specialists working in such a clean room not only maintain sterility, but also wear protective suits made of antistatic materials, masks, gloves. And yet, despite all the precautions to reduce the risk of rejects, processor companies are trying to automate as much of the cleanroom operations as they can by placing them on industrial robots.

The process of manufacturing processors is put on the conveyor. Delivered in a sealed box, a perfectly flat "wafer" goes through 400-500 technological operations and leaves the shop only a few months later in the form of a finished microchip.

Creation of a microchip from a "wafer" implies the construction of a very complex technological chain, which cannot be described in detail due to the limitations on the volume of the article. Even if they weren't there, companies like Intel and AMD are in no hurry to share production secrets. The design departments of the companies design the most complex three-dimensional schemes of the mutual arrangement of processor elements - microcircuit topology. They represent a multilevel pile of elements, which is divided into layers and deposited in layers on a silicon substrate. It is, of course, impossible to do it by hand, too delicate process, too small elements, literally nanometer in size.

Intel's eighth generation processors, known as Coffee Lake, are dotted with 14 nanometer transistors, AMD has announced the second generation of AMD Ryzen processors, codenamed Pinnacle Ridge, built on 12 nanometer cells. The latest NVIDIA graphics cards with the Volta core architecture are also built on 12nm technology. The system on the Qualcomm Snapdragon 835 chip is even smaller - only 10 nanometers. Constantly reducing the size of the functional elements of the processor and, consequently, increasing its performance is possible thanks to the improvement of technology called photolithography.

In general terms, this process can be described as follows:

First, the silicon wafer is covered with a base - a material that will have to become part of the future scheme, then a chemical reagent that is sensitive to light is applied on top of a uniform layer. This lineup will do all the work, but the point is later.

Previously, a highly secret detailed diagram of the processor is retrieved from corporate archives. Its lower layer is presented in the form of a negative and transferred to a photomask - a protective plate that acts like a stencil. It is significantly larger than the chip, so that the light passing through it is focused using a complex lens system, reducing the projected image to the desired size.

In those places where the light does not reach the silicon, the plate remains intact; in the illuminated, it initiates a reaction in a chemical reagent that changes its properties. Then the future processor will be treated with another compound, and these areas will dissolve, leaving only those areas that were not exposed. They also form the conductive logical elements of the processor.

Then a layer of dielectric is applied to the plate and new processor components are added on top, again using photolithography.

Some layers are heated, some are affected by ionized plasma, and others are covered with metal. Each type of processing changes the properties of the layer and slowly creates a piece of the puzzle that forms a specific chip model. The result is a kind of layered cake, where each layer has its own functionality and they are interconnected in a complex way by means of "tracks" of copper atoms, which are deposited on a silicon substrate from a copper sulfate solution, passing an electric current through it.

This is the final stage of processing, after which the microchips are checked for operability. Despite all the precautions and many days of effort, the rejection rate remains high. The robots will select and cut only 100% workable chips from the silicon wafer.
They will be sorted by energy efficiency, currents, and maximum operating frequencies, assigned different designations, and ultimately sold at different prices.

Final touches

On their way to customers, the processors leave the clean room and go to the assembly line, where the finished chip is glued onto a square called a substrate. The crystal is soldered with it in a special oven at a temperature of 360 degrees Celsius.

Then the chip is covered with a lid. It serves both to protect the still fragile silicon from damage and to remove heat from it. You probably have a good idea of \u200b\u200bit, the base of the cooling system will be pressed against the lid, whether it be a cooler or a heat exchanger of a CBO (water cooling system). This is no less important stage than the previous one. Indeed, the stability and speed of its operation, its future maximum performance, largely depends on how well the processor cover removes heat from the crystal.

Older Intel processors were literally soldered to the heat spreader caps. However, the latest generations of branded chips receive a thermal interface between the crystal and the lid and are cooled worse, which is very upsetting for computer hardware enthusiasts who want to squeeze the maximum out of their purchases. It got to the point that they "scalp" the processors - they independently remove the heat spreader from them and replace the thermal interface with a more efficient one. But let's not get distracted by overclocking tricks, since the processor is not yet ready.

The final stage is the creation of electrical contacts that will connect the microprocessor to the computer's motherboard. Usually, tin cylinders are made for this, the so-called "legs" of the processor, which are first glued and then soldered to the substrate, where places are provided for them in advance. For microchips with a large number of bonds, small tin balls are sometimes used instead of legs, since they are stronger and more reliable, but recently they have been abandoned in favor of simple contact pads.

The finished microchip is washed in a solution of water with a solvent to remove excess flux and dirt, and then a final check of the quality of the work done is carried out. These can range from stress tests to performance in a clean room or more severe tests. For example, chips designed to operate in extreme conditions, such as in the space and military industries, are sealed in ceramic cases and are repeatedly tested at extreme temperatures in vacuum chambers.

Then, depending on the purpose of the microprocessor, it goes directly to the hands of buyers, and then to motherboard sockets, or to other factories, where a small silicon crystal will take its place on the computer board of a video card, a space satellite, a smart refrigerator, and maybe it will end up in smartphone body.

How microprocessors are made

Have you ever been to the heart of the semiconductor industry - a microcircuit factory? Each such structure is a creation that can impress anyone, even an uninitiated person in the production processes.

Those who visited there had the feeling that they were making a fantastic journey into a futuristic anthill of robots or inside the microcircuit itself. There, in a sterile room the size of three football fields, robots and dozens of specialists scurried about, dressed in spacesuits and protective helmets. And high-precision machines for the production of microcircuits "hover" on special platforms, illuminated by yellow-orange light ...

Stages of production of crystals of microcircuits and photolithography

Integrated circuits are made on the surface of monocrystalline silicon (Silicon (Si) is used because it is the most suitable semiconductor for this purpose. In turn, semiconductors are a class of materials whose electrical conductivity is midway between the conductivity of conductors (mainly metals) and insulators (dielectrics) .Silicon can also act both as a dielectric and as a conductor - depending on the amount and type of impurities of other chemical elements present in it. And this feature is widely used in the production of microcircuits. However, in rare cases instead of silicon other materials are also used.In particular, Intel is able to implement bipolar transistors with heterojunction (HBT) on silicon-germanium (SiGe) into its 90-nm process technology by sequentially creating different layers on a thin (less than a millimeter) round (up to 30 cm in diameter) a silicon wafer called a substrate [Thin wafers are cut from a heavy long cylindrical single-crystal silicon billet, which is grown in a special precision method. Then the plates are polished to a mirror finish by mechanical and chemical methods. The "working" surface (that is, the one on which the microcircuit is further created) of the plate must be smooth and perfect at the atomic level and have a very precise crystallographic orientation (similar to different facets of a diamond when cut, but even more perfect)]. The layers are formed by various processes using chemicals, gases and light. The production of modern microprocessors is a complex process, consisting of more than three hundred steps - more than twenty layers are "ornate" interconnected in order to form a microprocessor circuit with a three-dimensional structure. The exact number of layers on the wafer depends on the specific processor design. Hundreds of identical microprocessors are created on a single silicon substrate and at the final stage are cut into separate rectangular crystals - chips.

The processes of forming various layers and patterns of microcircuit elements on a substrate are quite ingenious (in fact, this is a whole area of \u200b\u200bscience), however, they are based on one simple idea: since the characteristic dimensions of the pattern being created are so small (For example, a processor's cache cell on a 90-nm Prescott core a hundred times less than a red blood cell (erythrocyte), and one of its transistor is the size of a flu virus), that it is simply impossible to precipitate certain materials in the right places, they do it easier - the material is deposited immediately on the entire surface of the substrate, and then it is carefully removed from places where it is not needed. The process of photolithography is used for this.

H what is a "clean room" and why are they used in semiconductor factories?

The chips of the microcircuits must be produced in a controlled and very clean air environment. Since the functional elements (transistors, conductors) on microchips are very small, any foreign particle (dust, smoke, or skin flakes) that gets on the plate with future microcircuits at the intermediate stages of its production can damage the whole crystal. Clean rooms are classified by the size and amount of microparticles present in a unit volume (cubic foot, roughly equal to one-thirtieth of a cubic meter) of air. For example, Class 1 rooms used in modern manufacturing are about a thousand times cleaner than a surgical operating room. The Clean Room manages air purity by filtering incoming air, removing dirt from installations, laminar air movement from ceiling to floor (in about six seconds), humidity and temperature control. People in "clean rooms" wear special spacesuits that cover, among other things, the entire hairline (and in some cases even with their own respiratory system). To eliminate vibrations, clean rooms are located on their own vibration-proof foundation.

Photolithography is an unshakable basis for the production of microcircuits, and in the foreseeable future there is hardly a worthy replacement for it. Therefore, it makes sense to consider it in more detail. For example, we need to create a pattern in a layer of some material - silicon dioxide or metal (these are the most common operations in modern production). First of all, a thin (usually thinner than one micron) and continuous layer of the required material is created on the substrate in one way or another. Then photolithography is performed on it. To do this, first, a thin layer of a photosensitive material called a photoresist is applied to the surface of the plate (Photoresist is applied from the liquid phase, evenly distributed over the surface of the plate by rotating in a centrifuge and dried until solidification). Then the plate with the photoresist is placed in a precision installation, where the required areas of the surface are irradiated with ultraviolet light through transparent holes in the photomask (also called a photomask). The mask contains the corresponding (applied to the surface of the plate) pattern, which is developed for each layer during the design of the microcircuit. Under the influence of ultraviolet radiation, the irradiated areas of the photoresist change their properties so that it becomes possible to selectively remove them in certain chemical reagents (There is a negative and positive photoresist. One becomes stronger during irradiation, therefore its unirradiated areas are removed, and the other, on the contrary, loses its chemical resistance, therefore, its irradiated areas are removed. Accordingly, distinguish between positive and negative photolithography). After removing the photoresist, only those areas of the plate surface remain open over which the desired operation must be performed - for example, remove a layer of dielectric or metal. They are successfully removed (this procedure is called etching - chemical or plasma-chemical), after which the remnants of the photoresist can be completely removed from the surface of the plate, exposing the pattern formed in the layer of the desired material for further actions.

P in the production of modern microprocessors, it is necessary to perform photolithography operations up to 20–25 times - each time over a new layer. In total, this takes several weeks! In some cases, these are layers of insulating materials that serve as a gate dielectric for transistors or passivating (insulating) layers between transistors and conductors. In others, it is the formation of conductive polysilicon gates of transistors and metal conductors connecting transistors (For the sake of simplicity, some operations are sometimes combined - for example, the so-called self-aligned gates are made on the basis of the same photolithography by simultaneously forming a pattern of a gate dielectric and a thin polysilicon gate). Third, this is the formation of selectively doped regions (mainly drains and sources of transistors), and doping of the surface areas of a single-crystal silicon wafer with ionized atoms of various chemical elements (in order to create n- or p-type semiconductor regions in silicon) is not performed through windows in photoresist (it is too unstable for this), and through the pattern in a sufficiently thick layer of deposited dielectric (for example, the same silicon oxide). Then the dielectric is removed along with the photoresist.

Sometimes such an interesting method as explosive photolithography is also used. That is, first a pattern is formed (windows in the photoresist or temporary dielectric layer are etched out), then a continuous layer of new material (for example, metal) is applied to the surface of the plate, and, finally, the plate is placed in a reagent that removes the remnants of the photoresist or temporary dielectric. As a result, the removed layer “explodes” from the inside, taking away the pieces of the last applied metal lying on it, and in the previously “open” areas (windows) the metal remained and formed the functional pattern we needed (conductors or gates). And this is just the tip of the iceberg called microelectronic technology, which is based on the principle of photolithography.

Thus, a complex three-dimensional structure with a thickness of several microns is created on the surface of a silicon wafer, which, in fact, is an electronic circuit. The top of the circuit is covered with a thick (microns) layer of a passivating dielectric that protects the thin structure from external influences. It only opens windows for large, tens of micron side, square metal contact pads, through which supply voltages and electrical signals are fed to the circuit from the outside. And from below, the mechanical base of the microcircuit is a silicon wafer hundreds of microns thick. Theoretically, such a scheme could be made very thin (10–30 µm) and, if desired, even “rolled into a tube” without loss of functionality. And similar work has been carried out for some time in separate directions, although traditional crystals of microcircuits (chips) still remain "unbending".

After completing the technological procedures, each of the crystals on the wafer is tested (more on this in the next article), and then the wafer is cut into individual crystals (rectangular chips) using a diamond saw (Before cutting into crystals, the thickness of the wafer in modern microprocessors decreases by about a third at This allows them to be housed in more compact enclosures. Backside polishing also aims to remove foreign material and then form electrical and adhesive contacts to the substrate during packaging.) Then each chip is packed in its own case, which allows it to be connected to other devices. The type of packaging depends on the type of chip and how it will be used. Finally, all packaged chips are tested again (the unusable ones are rejected, the good ones undergo special stress tests at various temperatures and humidity, as well as electrostatic discharge testing), sorted by characteristics and compliance with certain specifications, and shipped to the customer.

Intel Copy Exactly Technology

Have For most chip manufacturers, the equipment and processes used in R&D laboratories are different from those used in finished goods factories. And when transferring production from experimental to serial production, there are often serious delays associated with the fact that new equipment requires significant modifications and adaptations of technological processes in order to achieve a high percentage of product yield previously obtained in laboratories. This not only delays mass production, but also leads to changes in hundreds of parameters of technological processes and even final products. The same is true if a process debugged in one factory is transferred to another with new equipment.

To prevent possible costs, Intel Corporation, which already has more than a dozen semiconductor factories, introduced Copy Exactly technology several years ago, the essence of which is that when the technology of manufacturing a product from a laboratory to a factory or between different factories is transferred, a complete to the smallest detail, the repetition (duplication) of everything that is associated with this process technology. For this, in particular, managers from factories are involved in product development. And when transferring technology, literally everything is copied - not only the input and output parameters of the processes (more than 500!), But also their course, equipment and parameters of its settings, suppliers of raw materials for technical processes, pipeline system, clean rooms and even methods of personnel training.

This innovative technology transfer technique has proven to be very successful. Today, it allows factories to reach full capacity almost immediately after launch - within a few weeks. In addition, Copy Exactly technology gives factories of one corporation great flexibility: started at one plant, plates without compromising quality and yield can be completed at another. And in the event of an accident or reorganization of one of the factories, others will "pick up" its business and the business will hardly suffer. This technology is also appreciated by competitors - for example, AMD and IBM - although it is currently not applicable between them, since their technological routes differ slightly.

Semiconductor factories

FROM the chip industry is now drawing to a close with one of those revolutions that will reshape the industry once every decade. Manufacturers are switching from substrates with a diameter of 200 mm to substrates with a diameter of 300 mm (see photo on the right), as a result of which it becomes possible to significantly reduce the cost of manufacturing microcircuits, and with it, all electronic semiconductor products. The fact is that a 300 mm diameter substrate provides a 225 percent increase in the area of \u200b\u200bthe silicon wafer and a 240 percent increase in the effective chip yield from each substrate. In addition, the environmental characteristics of production are significantly improved, which requires less consumption of chemicals and energy per processor, and creates less waste. Compared to a factory running on 200mm substrates, Intel said the new factory emits 48% less VOC, uses 42% less ultrapure water, and about 40% less energy. Labor costs are reduced by 50%.

Modern "300-mm" factories are gigantic industrial enterprises worth about $ 2 billion and an area of \u200b\u200bover a hundred thousand square meters. Few of today's chip companies (see the top twenty in the box on page 34) can afford to invest in such expensive factories. Indeed, for the construction and further operation of such enterprises, it is required to achieve a level of annual sales of at least $ 6 billion per plant. Such factories are usually called “foundry” - one of the translations of this term into Russian means “foundry”. The name embodies a colossal industrial scale: the jewelry manufacturing process of high-tech microprocessor elements is placed on an industrial flow, the scale of which is comparable only to the scale of production by huge metallurgical workshops. In 2000, when chip sales were booming, only ten companies in the world had sales in excess of $ 6 billion. Of the "old guard" today, only Intel, IBM, Infineon, AMD, Texas Instruments and Samsung own their own operating factories for the production of microcircuits on 300 mm substrates. Others are created and managed jointly by groupings such as Motorola - Philips - STMicroelectronics - Taiwan Semiconductor. Taiwan is the undisputed leader in plans to build new factories. Already in 2001, one fifth of the world's total substrate production was manufactured on the island, and by 2010 this share may reach 40%. China, Malaysia and Singapore are on the heels of Taiwan - they plan to build 15 factories, five of which will operate on 300 mm plates.

Have Intel has four such industrial-scale factories: F11X in Rio Rancho, New Mexico, two D1C and D1D in Hillsboro, Oregon, and the recently commissioned Fab 24 in Leixlip, Ireland. All of them can manufacture processors using 90nm technology; the fifth, Fab 12 in Chandler, Arizona, for the 65nm process, will be converted to 300mm wafers by 2005. And, for example, AMD plans to commission the first 300 mm Fab 36 factory only next year, see the review at www.terralab.ru/system/33692. Experts believe that existing factories with 200-mm substrates will be able to stay “afloat” until 2005, after which they will no longer be able to withstand the price competition with the 300-mm process. By 2005, chips will be made using 65 nm technology, and a billion transistors will be integrated on microprocessors! The chips will become so tiny they will allow voice-dialing cell phones to be embedded in a fountain pen.

Why are factories for the production of microcircuits so expensive (up to $ 5 billion)? Semiconductor factories perform the most complex tasks of any factory in the world. They use only specialized materials, bolts, structural elements, equipment, etc. In addition, Intel factories, for example, are almost double the average size of similar factories in the world. The building itself costs about 25% of the total cost of the factory and for ten years after its construction it remains a structure suitable for solving the most modern problems. Equipment (installations for photolithography, gas-phase deposition, ion implantation) and machines on the floor cost the remaining 75%.

Additional measurements are taken to ensure the vibration resistance of the foundation and installations. Even if the factory is outwardly one building, in fact it is several buildings separated from each other by small (up to 10 cm) gaps, and each building has its own foundation. This helps to damp various vibrations - both from external sources (vehicles, trains) and the equipment's own vibrations.